Hspice Menu

A. Specifying Simulation Input and Controls
1. Input Netlist File(<design>.sp) Guidelines
 The basic structure of an input netlist file consists of one main program and one or more optional submodules. The submodule can be used to easily alter and resimulate an input netlist file with different options, netlist, analysis statements, and test vectors. Several high level call statements can be used to restructure the input netlist file modules.The basic elements of an input netlist file are:
 
TITLE                           First line is Input Netlist File Title
*or $                            Commands to describe the circuit
.OPTIONS                       Set Conditions for Simulation
Analysis(.AC, .DC, .TRAN..)        Statements to Set Sweep Variables
.SAVE/.LOAD                     Save and load operating point info
.TEMP                           Set analysis temperature
.PRINT/.PLOT/.GRAPH            Set Print, Plot, and Graph Variables
.IC or .NODESET                 Sets Initial State
Sources (I or V)                   Sets Input Stimuli
Netlist                           Circuit Description
+                                In first Column ,+, is Continuation Char.
.SUBCKT/.ENDS                  Sets/Ends Subcircuit Description
.LIB or .INCLUDE                 Call Library or General Include Files
.PROTECT                       Turns off output printback
.UNPROTECT                    Restore output printback
.MODEL                         Library Element Model Descriptions
.END                            Required Statement to Terminate
Simulation

2. Input Line Format
 The Star-Hspice input reader can accept an input token, such as a statement name, a node name, or a parameter name or value.
 Upper and lower case are ignored.
 Comments are added at any place in the file. Line beginning with an asterisk (*) are comments.
 A statement may be continued on the next line by entering a plus (+) sign as the first nonnumeric, nonblank character in the next line.

3. Nodes
 Node identifiers can be up to 1024 characters long, including periods and extensions.
 Trailing Alphabetic Character are ignored in Node Number, (e.g. 5A=5B=5)
 Numerical node names are valid.
 Nodes are made global across all subcircuits by a .GLOBAL statement.
 Node 0, GND, GND!, and GROUND all refer to the global Star-Hspice ground.
4. Instance Names
 The names of element instances begin with the element key letter(for example, M for a MOSFET element, D for a diode, R for a resistor, and so on), except in subcircuits.
 Subcircuit instance name begin with “X”.(Subcircuits are sometimes called macros or modules.)

5. Numbers
 Numbers are entered as integer or real.
 Numbers can use exponential format or engineering key letter format, but not both(1e-12 or 1p, but not 1e-6u).
 Exponents are designated by D or E.
 Exponent size is limited by .OPTION EXPMAX.
 Units comments are not checked..
 .OPTIONS INGOLD controls the format of numbers in printouts.
 .OPTIONS NUMDGT=x controls the listing printout accuracy.

6. Instance and Element Names:
C           Capacitor
D           Diode
E,F,G,H     Dependent Current and Voltage Controlled Sources
I            Current
J           JFET or MESFET
K           Mutual Inductor
L           Inductor
M           MOSFET
Q           BJT
R           Resistor
O,T,U       Transmission Line
V           Voltage Source
X           Subcircuit Call
7. Units and Scale Factors
 Units:
           R   Ohm   (e.g. R1 n1 n2 1k)
           C   Farad  (e.g. C2 n3 n4 1e-12)
           L   Henry   (e.g. L3 n5 n6 1e-9)

 Scale Factors:

    
 Technology Scaling : All Length and Widths are in Meters
          Using  .options scale=1e-6      L=2  W=100
             (means that L=2um、W=100um)

8. Netlist Structure (SPICE Preferred)
Title                      Title statement – Ignored during simulation
      Controls                   .option nomod nopage
                                 .tran 1 10
                                 .print v(5) i(r1)
                                 .plot v(3) v(in)
                                 * voltage sources
      Sources                    v3  3  0 dc 0 ac 0 0 pulse 0 1 0 0.1 0.1 4
                                  vin in 0 sin(0 2 10k 0.5 0)
                                 *Components
      Components                c2  2  0   2pf
                                  r1  1  0   1k
                                  m1  1  2  3  4 mod L=10u W=30u
                                  x3  2  3  INV
                                 *Model & Subcircuit
      Models & Subckts           .model… or .LIB or .Subckt
      End file                    .end

9. Library Input Statement:
 Place commonly used commands, device models, subcircuit analysis and statements in library file by using the .LIB call statement. As each .LIB call name is encountered in the main data file, the corresponding entry is read in from the designated library file.
 Syntax
 .LIB ‘<filepath> filename’ entryname
 Example

 PROTECT            Prevent the listing of included contents
.LIB ‘/user2/class/vlsi22/models/mix025_1.l’ TT
.UNPROTECT

10. Hierarchical Circuits
 .SUBCKT Definition
 A circuit block that appears more than once in the overall circuit and consists of SPICE primitives can be defined as a subcircuit.
 The block can then be referenced as a single component, the subcircuit instance, and connected throughout circuit.
 The element that from the subcircuit block are preceded by the following control statement:
             .SUBCKT SUBname node1<node2…>       circuit description
             .ENDS <SUBname>

 Subcircuit Instance
 A subcircuit block is placed in the circuit by an X-element call, or subcircuit call, defined by the following line:
Xname xnode1<xnode2…>SUBname

 SUBCKT Statement: Examples

 .GLOBAL Statement
 The .GLOBAL statement globally assigns a node name. This means that all references to a global node name used at any level of the hierarchy in the circuit, will be connected to the same node.
 The .GLOBAL statement is most often used when subcircuits
are included in a netlist file. This statement assigns a common node name to subcircuit nodes.

 
B. Sources and Stimuli
1. Independent Source Elements: AC, DC Source
 Source Element Statement:
 Syntax :

 Examples of DC & AC Sources :

 Examples of Mixed Sources :

2. Independent Source Functions: Transient Sources
 Transient Sources Statement
 Types of Independent Source Functions:

 Pulse Source Function: PULSE
 Syntax :

 Example:

 Sinusoidal Source Function: SIN
 Syntax:
 Example:

 Piecewise Linear Source Function: PWL or PL
 Syntax:

 Example:

C. Analysis Types: Transient Analysis
 Transient Analysis Statements:
 .TRAN: Calculate Time-Domain Response

 .TRAN Analysis: Syntax

 Examples:

D. Simulation Output and Controls
1. Output Statements:
 Output Commands:
 .PRINT Statement : Print Numeric Analysis Results
 .PLOT Statement : Generates Low Resolution Plot in .lis file
 .PROBE Statement : Allows Save Output Variables Only into the
                      Graph Date Files
 .MEASURE Statement : Print Numeric Results of Measured  
Specifications

 Output Variables:
 DC and Transient Analysis:  Displays Individual Voltage, Current, & Power
 AC Analysis:  Display Real & Imag. Components of Voltage & 
Current.....
 Element Template Analysis:  Display Element-Specific Voltage, Current.....

2. Output Variable Examples: Parametric Statements
 Algebraic Expressions for Output Statements:
 .PRINT   DC V(IN)  V(OUT)  PAR(‘V(OUT)/V(IN)’)
 .PROBE  AC  Gain=PAR(‘VDB(5)-VDB(2)’)   Phase=PAR(‘VP(5)-VP(2)’)

 Other Algebraic Expressions :
 Parameterization: .PARAM  WN=5u  LN=10u  VDD=5.0V
 Algebra: .PARAM  X=‘Y+5’
 Function: .PARAM  Gain(IN, OUT)=‘V(OUT)/V(IN)’
 Algebra in Element: R1 1 0 r=‘ABS(V(1)/I(M1))+10’

 Built-In Functions :

3. Displaying Simulation Results: .PRINT & .PLOT
 Syntax:

 Examples:

4. Displaying Simulation Results: .PROBE & .GRAPH
 .PROBE Statement: